9th International IEEE Conference
Dependable Systems, Services and Technologies
UKRAINE, KYIV, MAY 24-27, 2018

  • Information

  • Deadlines

    (23:59 UTC+0)

    Paper submission: March 4, 2018 March 14, 2018 March 19, 2018 (Extra deadline for update only)
    Notification of paper acceptance: April 25, 2018
    Final manuscript: April 30, 2018
    Registration and payment: May 3, 2018

    Program draft publication: May 7, 2018
    Conference date: May 24-27, 2018

  • Contacts

    Department 503, DESSERT’2018 Organizing Committee,
    National Aerospace University n. a. N. E. Zhukovsky “KhAI”,
    Chkalov str., 17, Kharkiv, 61070, Ukraine
    Phone: +38 (095) 564 76 69
    (contact person – Anastasiia Strielkina)

Alex Yakovlev

Real-Power Computing


The traditional hallmark in embedded systems has been to minimize energy consumption while meeting hard and/or soft real-time deadlines. The basic principle was to transfigure the uncertainties of task execution times in the real world into energy saving opportunities. Emerging ubiquitous and autonomous systems will have to survive and operate under unreliable or limited power budgets. This will require significant changes in the computing paradigm underpinning their design. In this talk we introduce the concept of Real-Power Computing, where we will address hard and soft real-power systems, energy and power predictability, power-compute co-design principles, power-proportional computing architectures, run-time support for system survival, implications on programming models for real-power and some case studies for real-power computing.

Professor Alex Yakovlev is an international pioneer of low-power asynchronous circuit design and automation, for which he was elected to Fellow of IEEE in 2016 and RAEng in 2017. He is Professor of Computing Systems Design at the School of Engineering, Newcastle University, where he has been working since 1991. He received DSc from Newcastle University in 2006, and PhD from St. Petersburg Electrical Engineering Institute (Russia) in 1982, both in the field of asynchronous systems. Amongst his most notable achievements is the invention of the Signal Transition Graph, which is a de-facto standard for modelling asynchronous control circuits, its theoretical study, analysis and synthesis algorithms and CAD support (tools Petrify and Workcraft), extensively used by industry. He was finalist of 2002 EU Descartes Prize and has won 10 best paper awards, including DATE 2011.

At Newcastle, since 2000 he is Head of the Microsystems Group and Founder of the Asynchronous Systems Lab, with 50 PhD alumni. His team is well-known for its contributions in designing asynchronous circuits, concurrent systems, Petri nets, metastability and synchronizers. He has published 8 monographs and over 300 papers in top international journals and conferences. He has managed over 30 grants, including recently being a Theme Leader on the Holistic project on new generation of energy harvesting electronics and PRiME Programme Grant on power-efficient, reliable, many-core embedded systems. He built his expertise in power-proportional computing and design for survivability through a prestigious EPSRC-funded Dream Fellowship in 2011-12, from which he holds international patents. He has chaired several major conferences (e.g. ASYNC, DATE-WS, PATMOS), and has given many invited/keynote talks on related topics. He is an associate editor of IEEE Trans. Computers and IET CDT.